Design and Analysis of 4bit Array Multiplier using 45nm Technology: A.Karthikeyan

In digital signal processors multipliers play a major role because, high multiplication process is carried out in hardware part in digital circuits. Array multiplier also requires less space for implementation in ICs and is an efficient way of multiplication in digital integrated circuits [3-4]. In this paper we have designed and analysed a four bit array multiplier using 45nm CMOS process. Array multiplier consumes less power and is highly efficient in terms of speed. In this work a 4-bit array multiplier and its functionality is verified using Xilinx ISE Tool. In order to analyse the speed and power a 4-bit array multiplier is simulated using SPICE Tools with a supply voltage of 1volt the room temperature simulation results indicates the 4-bit multiplier consumes a power of 160μw and has a delay of 185pS for 45m CMOS process. Keywords— array multiplier, , digital processor, full adders power and delay &45nm technology